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| IP/SOC 2004 (IP
Based SoC Design) will be the 13th edition of the Working
conference on hot topics in the design world, focusing for the past
4 years on IP based SoC design and hold in the well known Silicon
and Alliance Nanometer Valley in the French Alps.
WORKING CONFERENCE
The areas of interest for the IP/SOC 2004 (IP Based SoC Design)
event includes (but not restricted to):
- Silicon and Software IP design and packaging
- Impact of Nano technology
- IP /SOC design flow, IP based ASIC platforms, IP/SoC
qualification, emulation and prototyping, impact of SystemC
- Internet/Intranet Catalog technology, web based collaborative
design, IP/SoC design data management.
Similarly to the
previous events, this working conference in 2004 will be partitioned
into technical papers, panels and invited papers with a balanced
contribution from industrial and academic participants. Panels on
hot topics such as the impact of Nano technology, verification
challenge, IP business, SystemC, ASIC platforms are already planned
for an exciting 2004 event Please identify yourself for
participation to a session, a panel. New topics are welcome, please
contact us at ipsoc2004@design-reuse.com
IP/SOC 2004 BEST PRIZES
Best IP/SoC Award 2004
will be delivered under the sponsorship of ST Microelectronics and
The Alliance of Crolles both for the best design and design
methodology / tool contribution.
Best contributions and
hottest events will be live on demand on D&R web site for 6
months after the event
EXHIBITION
In addition the "IP/SoC 2004 working conference" has an
exhibition attached, giving you the opportunity to see the reality
of a SOC connected world. The joint exciting dedicated exhibition
will allow you to meet the most advanced suppliers and take the
chance to see the last products of the best vendors.
Book
your space now.
PROGRAM COMMITTEE MEMBERS
- G. SAUCIER - Design And Reuse, France
- Technical Program Chair :
- H. KRUPNOVA - ST Microelectronics, France
- Industry / University representatives :
- Prof. K. ASADA - Tokyo University, Japan
- P. BLOUET - ST Microelectronics, France
- P. BRICAUD - Synopsys, France
- A. BRUENING - sci-worx GmbH, Germany
- T. DANIELS - LSI Logic, UK
- B. DE LOORE - Philips Semiconductors, The Netherlands
- S. DUTTA - Philips Semiconductors, USA
- P. DWORSKY - Synopsys, USA
- J. HAASE - Edacentrum, Germany
- J. HILLSBERG - IBM, SW
- P. MAGARSHACK - ST Microelectronics, France
- S. MORI - IPTC, Japan
- H.N. NGUYEN - Bull, France
- T. PFIRSCH - Alcatel, Belgium
- F. RENOUX - Dolphin Integration, France
- M. ROBERT - LIRRM,University Montpellier, France
- Prof. W. ROSENSTIEL - FZI Karlsruhe University, Germany
- R. SUAYA - Mentor Graphics, France
- Prof. R. UBAR - Tallinn Technical University, Estonia
- Prof. N. WEHN - University of Kaiserslautern , Germany
- H. VAN DER WILDT - Sagantec, USA
- D. WOOD - Mentor Graphics, UK
- P. COEURDEVEY - Design And Reuse, France
- T. HENNIE - Consultant, UK
SUBMISSION PROCEDURE
You
can submit an electronic version of your executive summary (3 pages
approximately) in a Word, PDF or PostScript format using one of the
following methods :
1. By using the Online Submission Form
## RECOMMENDED ##
http://www.us.design-reuse.com/ipsoc2004/submit
2.
By sending an e-mail containing the paper title, yours names,the
name of the contact author, postal and e-mail address,telephone and
fax number, as specified in the online submission form to ipsoc2004@design-reuse.com.
All
the correspondence with authors will be handled by
e-mail.
Outstanding papers submitted or accepted in other
conferences will also be considered in this workshop. Please specify
it in your submission.
IMPORTANT DATES
| Deadline for submission of executive summary |
September 25, 2004 |
| Notification of acceptance |
October 23, 2004 |
| Final Version of the manuscript |
November 13, 2004 |
Working Conference
|
December 8-9,
2004 |
LOCATION
Espace Congres du World Trade Center
5 place
Robert Schuman
38 000 Grenoble
FRANCE
IP/SOC CONFERENCE
ARCHIVES
The foils of previous years' "IP Based SoC
Design" events presentations are available online :
Note also that
three hot panels as well as Synopsys keynote talk from Raul
Camposano that took place during IP SOC 2003 have been sponsored to
become the first live webcasts on D&R site, namely:
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AROUND
WWW.DESIGN-REUSE.COM
- SPONSOR MESSAGE: TRUE CIRCUITS, INC.
True Circuits,
Inc. offers a family of standardized clock generator, deskew,
low-bandwidth and spread-spectrum PLLs & DDR DLLs that spans
nearly all performance points and features typically requested by
ASIC designers. These high-quality, low-jitter, silicon-proven
hard macros are available for immediate delivery in a range of
frequencies, multiplication factors and functions in TSMC, UMC and
Chartered processes from 0.25 to 0.09 micron. Call (650) 691-2500
or visit http://www.truecircuits.com/dr5
- SOC NEWS ALERTS
Receive free news updates related to
the SoC field on your desktop on a regular basis, go to :
http://www.us.design-reuse.com/users/change_settings.php
- MISSED IP BASED DESIGN 2003 ????
The presentations
are available online, go to :
http://www.us.design-reuse.com/ipbasedsocdesign/2003
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World
Trade Center
5 place Robert Schuman
38025 Grenoble
Cedex
FRANCE
Tel: +33 476 70 64 87
Fax: +33 476 70 64
53
info@design-reuse.com
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Road
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